Field of the Invention
Described herein are methods and devices relating generally to light emitting diode (LED) devices, and specifically to LED devices comprising mirror layers and contact vias.
Description of the Related Art
Light emitting diodes (LED or LEDs) are solid state devices that convert electric energy to light, and generally comprise one or more active layers of semiconductor material sandwiched between oppositely doped layers. When a bias is applied across the doped layers, holes and electrons are injected into the active layer where they recombine to generate light. Light is emitted from the active layer and from all surfaces of the LED.
For typical LEDs it is desirable to operate at the highest light emission efficiency, and one way emission efficiency can be measured is by the emission intensity in relation to the input power, or lumens per watt. One way to maximize emission efficiency is by maximizing extraction of light emitted by the active region of LEDs. For conventional LEDs with a single out-coupling surface, the external quantum efficiency can be limited by total internal reflection (TIR) of light from the LED's emission region. TIR can be caused by the large difference in the refractive index between the LED's semiconductor and surrounding ambient. Some LEDs have relatively low light extraction efficiencies because of the high index of refraction of the substrate compared to the index of refraction for the surrounding material (e.g. epoxy). This difference results in a small escape cone from which light rays from the active area can transmit from the substrate into the epoxy and ultimately escape from the LED package.
Light that does not escape can be absorbed in the semiconductor material or at surfaces that reflect the light.
Different approaches have been developed to reduce TIR and improve overall light extraction, with one of the more popular being surface texturing. Surface texturing increases the light escape probability by providing a varying surface that allows photons multiple opportunities to find an escape cone. Light that does not find an escape cone continues to experience TIR, and reflects off the textured surface at different angles until it finds an escape cone. The benefits of surface texturing have been discussed in several articles. [See Windisch et al., Impact of Texture-Enhanced Transmission on High-Efficiency Surface Textured Light Emitting Diodes, Appl. Phys. Lett., Vol. 79, No. 15, October 2001, Pgs. 2316-2317; Schnitzer et al. 30% External Quantum Efficiency From Surface Textured, Thin Film Light Emitting Diodes, Appl. Phys. Lett., Vol 64, No. 16, October 1993, Pgs. 2174-2176; Windisch et al. Light Extraction Mechanisms in High-Efficiency Surface Textured Light Emitting Diodes, IEEE Journal on Selected Topics in Quantum Electronics, Vol. 8, No. 2, March/April 2002, Pgs. 248-255; Streubel et al. High Brightness AlGaNInP Light Emitting Diodes, IEEE Journal on Selected Topics in Quantum Electronics, Vol. 8, No. March/April 2002]. Additionally, U.S. Pat. No. 6,657,236, also assigned to Cree Inc., discloses structures formed on the semiconductor layers for enhancing light extraction in LEDs.
Another way to increase light extraction efficiency is to provide reflective surfaces that reflect light so that it contributes to useful emission from the LED chip or LED package. In a typical LED package 10 illustrated in FIG. 1, a single LED chip 12 is mounted on a reflective cup 13 by means of a solder bond or conductive epoxy. One or more wire bonds 11 connect the ohmic contacts of the LED chip 12 to leads 15A and/or 15B, which may be attached to or integral with the reflective cup 13. The reflective cup may be filled with an encapsulant material 16 which may contain a wavelength conversion material such as a phosphor. Light emitted by the LED at a first wavelength may be absorbed by the phosphor, which may responsively emit light at a second wavelength. The entire assembly is then encapsulated in a clear protective resin 14, which may be molded in the shape of a lens to collimate the light emitted from the LED chip 12. While the reflective cup 13 may direct light in an upward direction, optical losses may occur when the light is reflected. Some light may be absorbed by the reflector cup due to the less than 100% reflectivity of practical reflector surfaces. Some metals can have less than 95% reflectivity in the wavelength range of interest.
FIG. 2 shows another conventional LED package 20 that may be more suited for high power operations that can generate more heat. In the LED package 20, one or more LED chips 22 are mounted onto a carrier such as a printed circuit board (PCB) carrier, substrate or submount 23. A reflector 24 can be included on the submount 23 that surrounds the LED chip(s) 22 and reflects light emitted by the LED chips 22 away from the package 20. Different reflectors can be used such as metal reflectors, omni-directional reflectors (ODRs), and distributed Bragg reflectors (DBRs). The reflector 24 can also provide mechanical protection to the LED chips 22. One or more wirebond connections 11 are made between ohmic contacts on the LED chips 22 and electrical traces 25A, 25B on the submount 23. The mounted LED chips 22 are then covered with an encapsulant 26, which may provide environmental and mechanical protection to the chips while also acting as a lens. The metal reflector 24 is typically attached to the carrier by means of a solder or epoxy bond.
The reflectors shown in FIGS. 1 and 2 are arranged to reflect light that escapes from the LED. LEDs have also been developed having internal reflective surfaces to reflect light internal to the LEDs. FIG. 3 shows a schematic of an LED chip 30 with an LED 32 mounted on a submount 34 by a metal bond layer 36. The LED further comprises a p-contact/reflector 38 between the LED 32 and the metal bond 36, with the reflector 38 typically comprising a metal such as silver (Ag). This arrangement is utilized in commercially available LEDs such as those from Cree® Inc., available under the EZBright™ family of LEDs. The reflector 38 can reflect light emitted from the LED chip toward the submount back toward the LED's primary emitting surface. The reflector also reflects TIR light back toward the LED's primary emitting surface. Like the metal reflectors above, reflector 38 reflects less than 100% of light and in some cases less than 95%. The reflectivity of a metal film on a semiconductor layer may be calculated from the materials' optical constants using thin film design software such as TFCalc™ from Software Spectra, Inc. (www.sspectra.com). U.S. Pat. No. 7,915,629, also assigned to Cree Inc. and fully incorporated herein by reference, further discloses a higher efficiency LED having a composite high reflectivity layer integral to the LED for improving emission efficiency.
In LED chips having a mirror contact to enhance reflectivity (e.g. U.S. Patent Publication No. 2009/0283787, which is incorporated in its entirety herein by reference), the light extraction and external quantum efficiency (EQE) is strongly affected by the reflectivity of the mirror. For example, in a mirror comprised of Ni/Ag, the reflectivity is dominated by the properties of the Ag, which is >90% reflective. However, as shown in FIG. 4, such a mirror 40 is traditionally bordered by a metal barrier layer 42 that encompasses the edges of the mirror, with the barrier layer 42 provided to prevent Ag migration during operation. The metal barrier layer 42 has much lower reflectivity than the mirror (e.g. 50% or lower), and the portions of the barrier layer 42 contacting the active layer 44 outside the mirror 40 periphery can have a negative effect on the overall efficiency of the LED chip. This is because such portions of the metal barrier layer 42 absorb many of the photons that would otherwise exit the chip. FIG. 5 depicts another LED chip 50 in the EZ family of Cree, Inc. lights, with the chip 50 comprising a mirror 52 disposed below an active region 54. As in FIG. 4, a barrier layer 56 is provided that borders mirror 52 as well as extending outside the periphery of the mirror. Those portions of the metal barrier layer extending beyond the edges of the mirror 52 can likewise absorb some of the light emitted from the LED(s) and impact the overall emitting efficiency of the chip.
In LED chips comprising a plurality of junctions or sub-LEDs, such as those disclosed in U.S. Pat. No. 7,985,970, and U.S. Patent Pub. No. 2010/0252840 (both assigned to Cree Inc. and incorporated entirely herein by reference), the effect of the metal barrier layer can be particularly pronounced. FIG. 6 depicts a monolithic LED chip comprising a plurality of sub-LEDs and a plurality of contact vias 62. Portions of barrier layers 64, as represented by the dark circles at the peripheries of the vias 62, are exposed and illustrate the dimming effect that can result from such exposure of underling layers, such as the barrier layer. The effect can be very pronounced when comparing the efficiency of large, single-junction chips to multi-junction chips of the same footprint. This is because the smaller the junction is relative to the barrier layer exposed at the mirror periphery, the more severe the impact is on the overall emission efficiency of the device. For example, a 16-junction, 1.4 mm LED chip can be approximately 10% dimmer than a single-junction 1.4 mm chip.
Another source of such dark circle dimming around the vias 62 as shown in FIG. 6 is the utilization of “dark metals” having light absorptive and/or low reflective properties as interconnect layer material within and around the edges of the via 62. Interconnect layers can be utilized to connect adjacent junctions or sub-LEDs. The dark metals include such metals such as Titanium (Ti), Nickel (Ni), Tungsten (W), and a Titanium Tungsten alloy (TiW) and are utilized as interconnect layer material due to their resistance to electromigration; however, like the barrier layers 64 above, the dark metal interconnect layers exhibit a dimming effect that negatively affects LED chip light output.
It is difficult to resolve the issue of the dark circles around the vias 62 caused by the visible portions of the barrier layer and/or interconnect layers through conventional means. For example, there are limitations as to how close to the via 62 conventional mirror layers, often carrying current, can be designed without risking causing a short and therefore device malfunction. Conventional mirror layers should therefore be designed at some “tolerance distance” from the vias 62. The spatial gap caused by this tolerance distance allows for more of the underlying dark material to affect light output. Additionally, even if one were to apply a mirror layer at a tolerance distance, the corresponding manufacturing process requires a significant degree of precision to obtain the correct tolerance distance.